As power semiconductor materials to actualize large current and low power consumption, Si can first be enumerated, and new materials of SiC, GaN and others can also be enumerated. In addition, gallium oxide and diamond are also promising as next generation materials. On the other hand, they are basically used in the form of monocrystals, and therefore they have drawbacks that growth of the monocrystals on different substrates is difficult and selection of the substrates is limited.
With respect to SiC, a preferable crystal structure as the power semiconductor is 4H—SiC, and as dielectric breakdown field of the same, 3 MV/cm or more is actualized. However, inconformity of lattices is large, and hence it is difficult to achieve epitaxial growth of the monocrystals with less defects on Si at a high yield ratio. In the case of 3C—SiC, the epitaxial growth can be achieved by applying micro fabrication to each of Si wafers or by using Si (211) face, but each bandgap is narrow, and so the dielectric breakdown field is limited at a level of 1.2 MV/cm. Moreover, in a case of GaN, its dielectric breakdown field is 3 MV/cm or more like 4H—SiC, and for mass production, crystal growth on Si has been tried. The inconformity of lattices of GaN to Si is not as bad as that of SiC, but the crystal growth is difficult unless a buffer layer such as AlN is interposed therebetween, which disturbs the mass production.
Thus, in Patent Document 1, there has been performed development to a power device in which conformity to a different substrate is intended by use of an oxide semiconductor of polycrystals or amorphous. In general, as described in Non-Patent Document 1, in the case of a uni-polar type power device, the following formula is established to obtain the lowest on-resistance, and if a withstand voltage design and a type of semiconductor material are determined, an optimal carrier concentration is determined. However, in an amorphous or polycrystal semiconductor, it is difficult to control the carrier concentration:
      N    D    =                    ɛ        S            ⁢              E        C        2                    2      ⁢                          ⁢      qBV      in which εs is a dielectric constant of the material, Ec is a maximum dielectric breakdown field, q is an elementary charge, BV is a withstand voltage which is a design value, and ND is a carrier concentration.